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{ IRstate=IR_idle; break; } if (time>msec_1p68) { IRaddr|= bits; } bits=bits<<1; if (!bits) { IRstate=IR_getaddrinv; bits=1; } break; case IR_getaddrinv: TR1=0; time=TH1; time =(time <<8)+TL1;; TL1=0; TH1=0; TR1=1; if ((time>msec_2p5)||(time<msec_0p9)) { IRstate=IR_idle; break; } if (time>msec_1p68) { _IRaddr|= bits; } bits=bits<<1; if (!bits) { IRstate=IR_getdata;; bits=1; } break; case IR_getdata: TR1=0; time=TH1; time =(time <<8)+TL1;; TL1=0; TH1=0; TR1=1; if ((time>msec_2p5)||(time<msec_0p9)) { IRstate=IR_idle; break; } if (time>msec_1p68) { IRdata|= bits; } bits=bits<<1; if (!bits) { IRstate=IR_getdatainv; bits=1; } break; case IR_getdatainv: TR1=0; time=TH1; time =(time <<8)+TL1;; TL1=0; TH1=0; TR1=1; if ((time>msec_2p5)||(time<msec_0p9)) { IRstate=IR_idle; break; } if (time>msec_1p68) { _IRdata|= bits; } bits=bits<<1; if (!bits) { IR_ready=((IRaddr^_IRaddr)==0xff)&&((IRdata^_IRdata)==0xff)&&(IRaddr==0); if(IR_ready) { IRstate=IR_idle; } } break; default: IRstate=IR_idle; break; } } void main(void) { cpu_init(); while(1) { if(IR_ready) { IR_ready=0; switch(IRdata) { case 0x45: break; case 0x44: break; case 0x43: break; case 0x08: break; case 0x5a: break; default: break; } } } } <!--自定義字段--> |