為了克服這個問題，該解決方案提供一種高于要求的電壓范圍的可選擇參考電壓，并且使用內(nèi)部增益寄存器（m）和失調(diào)寄存器（c）獨立調(diào)整每個通道輸出達到要求的范圍。

　　為了給出－8.192 V～＋8.192 V（包括零點誤差和滿度誤差）大約輸出范圍，使用4.096 V參考電壓。

　　測量零點電壓和滿度電壓，例如分別為－8.193 V和＋8.195 V

　　計算LSB的大小，即8.195 V － (－8.193 V)/65536 = 250 μV。

　　為了將零點電壓從－8.193 V移動到－8 V需要的步距為0.193 V/250 μV = 772 LSB

　　現(xiàn)在的滿度電壓為8.195 V+0.193 V=+8.388 V。為了從+8.388 V降低到+8 V需要的步距為0.388 V/250 μV = 1552 LSB。

　　你現(xiàn)在可以將這些數(shù)據(jù)設(shè)置到DAC通道的失調(diào)寄存器（c）和增益寄存器（m）

　　失調(diào)寄存器的默認值為32768。根據(jù)32768 + 772 = 33540，對給定的－8 V零點電壓重新設(shè)置這個數(shù)據(jù)。

　　增益寄存器的默認值為65535。根據(jù)35535－1552 = 63983，對給定的＋8 V零點電壓重新設(shè)置這個數(shù)據(jù)。

　　The AD5360/AD5361 contain 16, 16-/14-bit DACs in a single 52-lead LQFP package. It provides buffered voltage outputs with a span four times the reference voltage. The gain and offset of each DAC can be independently trimmed to remove errors. For even greater flexibility, the device is divided into two groups of eight DACs, and the output range of each group can be independently adjusted by an offset DAC.

　　The AD5360/AD5361 offer guaranteed operation over a wide supply range with VSS from −4.5 V to −16.5 V and VDD from +8 V to +16.5 V. The output amplifier headroom requirement is 1.4 V operating with a load current of 1 mA.

　　The AD5360/AD5361 have a high speed 4-wire serial interface, which is compatible with SPI, QSPI™, MICROWIRE™, and DSP interface standards and can handle clock speeds of up to 50 MHz. All the outputs can be updated simultaneously by taking the LDAC input low. Each channel has a programmable gain and an offset adjust register.

　　Each DAC output is amplified and buffered on-chip with respect to an external SIGGND input. The DAC outputs can also be switched to SIGGND via the CLR pin.

　　主要特性：

　　16-channel DAC in 52-lead LQFP package

　　Guaranteed monotonic to 16/14 bits

　　Nominal output voltage range of −10 V to +10 V

　　Multiple output spans available

　　Temperature monitoring function

　　Channel monitoring multiplexer

　　GPIO function

　　System calibration function allowing user-programmable offset and gain

　　Channel grouping and addressing features

　　Data error checking feature

　　SPI-compatible serial interface

　　2.5 V to 5.5 V digital interface

　　Digital reset (RESET)

　　Clear function to user-defined SIGGNDx

　　Simultaneous update of DAC outputs

　　應(yīng)用：

　　Instrumentation

　　Industrial control systems

　　Level setting in automatic test equipment (ATE)

　　Variable optical attenuators (VOA)

　　Optical line cards

　　圖1。AD5360功能方框圖

　　圖2。和Blackfin DSP 的連接圖